[MaKB03] A. Maheshwari, I. Koren and W. Burleson, "Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits," (pdf file) Proc. of the 2003 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 597-604, November 2003.
[LaKK03] V. Lakamraju, I. Koren and C.M. Krishna, "Low Overhead Fault Tolerant Networking in Myrinet," (pdf file) Proc. of the Dependable Computing and Communication Symp. (DSN), pp. 193-202, June 2003.
[UnKo03] O.S. Unsal and I. Koren, "System-Level Power-Aware Design Techniques in Real-Time Systems," (Invited paper) (pdf file) Proceedings of the IEEE, pp. 1055-1069, July 2003.
[BBKMP03a] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri and V. Piuri, "Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm," (pdf file), Proc. of ASAP'03 - the Internl. Conference on Application-Specific Systems, Architectures and Processors, pp. 423-432, June 2003.
[BBKMP03b] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri and V. Piuri, "Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard," (pdf file), Proc. of the 2003 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 105-113, Nov. 2003.
[KKO03] I. Koren, Y. Koren and B. Oomman, "Saturating Counters: Application and Design Alternatives," (pdf file), Proc. of the 16th IEEE Symp. on Computer Arithmetic, pp. 228-235, June 2003.
[BBKMP03] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri and V. Piuri, "Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard," (pdf file), IEEE Trans. on Computers, pp. 492-505, April 2003.
[LAKK02] V. Lakamraju, I. Koren and C.M. Krishna, "Filtering Random Networks to Synthesize Interconnection Networks with Multiple Objectives," (pdf file) IEEE Transactions on Parallel and Distributed Systems, pp. 1139-1149, October 2002.
[SiK002] M. Singh and I. Koren, "Incorporating Fault Tolerance in Analog-to-Digital Converters (ADCs)," (pdf file) Proc. of the International Symposium on Quality of Electronic Design (ISQED'02), pp. 286-291, March 2002.
[KaIK02] R. Karri, B. Iyer and I. Koren, "Phantom Redundancy: A Register Transfer Level Technique for Gracefully Degradable Data Path Synthesis," (pdf file) IEEE Trans. on Computer-Aided Design, pp. 877-888, August 2002.
[KRKK02] Z. Koren, J. Rajagopal, C. M. Krishna, I. Koren, W. Wang and J. Loman, "Using Rational Approximations For Evaluating The Reliability of Highly Reliable Systems," (pdf file) Proc. of the PMEO-PDS'02 workshop, IPDPS, pp. 258-263, April 2002.
[URKK01] O. Unsal, A. Raksit, I. Koren, C. M. Krishna, and C.A. Moritz, "Cool Cache for Hot Multimedia," (pdf file) Proc. of MICRO'34, The international Sympo. on Microarchitecture , pp. 274-283, Dec. 2001.
[PhGK01] D.S. Phatak, T. Goff and I. Koren, "Constant-time Addition and Simultaneous Format Conversion Based on Redundant Binary Representations," (pdf file) IEEE Trans. on Computers , pp. 1267-1278, Nov. 2001.
[DuKK01] G. Durairaj, I. Koren and C.M. Krishna, "Importance Sampling to Evaluate Real-Time System Reliability: A Case Study," (pdf file) Simulation , vol. 76, no. 3, pp. 172-183, March 2001.
[SiKo01] M. Singh and I. Koren, "Reliability Enhancement Techniques for Analog-to-Digital Converters (ADCs)," (pdf file) Proc. of the 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 347-353, October 2001.
[KoCK01] I. Koren, G. Chapman and Z. Koren, "Advanced Fault-Tolerance Techniques for a Color Digital Camera-On-A-Chip, " (pdf file) Proc. of the 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 3-10, October 2001.
[SiRK01] M. Singh, R. Rachala and I. Koren, "Transient Fault Sensitivity Analysis of Analog-to-Digital Converters," (pdf file) Proc. of WVLSI 2001, April 2001.
[KoKo00] I. Koren and Z. Koren, "Incorporating Yield Enhancement into the Floorplanning Process," (pdf file) IEEE Trans. on Computers, Special Issue on Defect Tolerance in Digital Systems , Vol. 49, pp. 532-541, June 2000.
[HLKK00] J. Haines, V.R. Lakamraju, I. Koren and C.M. Krishna, "Application-Level Fault Tolerance as a Complement to System-Level Fault Tolerance," (pdf file) The Journal of Supercomputing, Special Issue on "Embedded Fault-Tolerant Computing Systems," Vol. 16, pp. 53-68, Kluwer Academic Publishers, MA, 2000.
[ACDH00] M. Allalouf, J. Chang, G. Durairaj, J. Haines, V.R. Lakamraju, K. Toutireddy, O.S. Unsal, K. Yu, I. Koren and C.M. Krishna, "The RAPIDS Simulator: A Testbed for Evaluating Scheduling, Allocation, and Fault-Recovery in Distributed Real-Time Systems," (pdf file) Dependable Network Computing, D. Avresky (Editor), pp. 413-431, Kluwer Academic Publishers, MA, 2000.
[PrKo00] R. K. Prasad and I. Koren, "Constructive Floorplanning with a Yield Objective," (pdf file) Proc. of the International Symposium on Quality of Electronic Design, pp. 261-266, March 2001.
[PrKo00a] R. K. Prasad and I. Koren, "The Effect of Placement on Yield for Standard Cell Designs," (pdf file) Proc. of the 2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 3-11, October 2000.
[KCK00] I. Koren, G. Chapman and Z. Koren, "A Self-Correcting Active Pixel Camera," (pdf file) Proc. of the 2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 56-64, October 2000.
[Ko00] I. Koren, "Should Yield be a Design Objective?" (invited paper), (pdf file) Proc. of the International Symposium on Quality of Electronic Design, pp. 115-120, March 2000.
[AlKo99] D. H. Albonesi and I. Koren, "STATS: A Framework for Microprocessor and System-Level Design Space Exploration," (pdf file) Journal of System Architecture, Vol. 45, pp. 1097-1110, 1999.
[PhKo99] D.S. Phatak and I. Koren, "Intermediate Variable Encodings that Enable Multiplexor-based Implementations of Two Operand Addition," (pdf file) Proc. of the 14th IEEE Symp. on Computer Arithmetic, pp. pp. 22-29, April 1999.
[VeKo99] A. Venkataraman and I. Koren, "Determination of yield bounds prior to routing," (pdf file) Proc. of the 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 4-13, November 1999.
[KoKo98] I. Koren and Z. Koren, "Defect Tolerant VLSI Circuits: Techniques and Yield Analysis," (pdf file) Proceedings of the IEEE, Vol. 86, pp. 1817-1836, Sept. 1998.
[KoKo98b] I. Koren and Z. Koren, "Yield and Routing Objectives in Floorplanning," (pdf file) Proc. of the 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 28-36, November 1998.
[KKKr98] Z. Koren, I. Koren and C.M. Krishna, "Surge Handling as a Measure of Real-Time System Dependability," (pdf file) Proc. of the IPPS/SPDP'98 workshop, in Parallel and Distributed Processing, J. Rolim (Ed.), Lecture Notes in Computer Science 1388, Springer 1998, pp. 1106-1116.
[AlKo97] D. H. Albonesi and I. Koren, "Improving the Memory Bandwidth of Highly-Integrated, Wide-Issue, Microprocessor-Based Systems," (pdf file) Proc. of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT'97), pp. 126-135, Nov. 1997.
[KoKo97] Z. Koren and I. Koren, "On the Effect of Floorplanning on the Yield of Large Area Integrated Circuits" , (pdf file) IEEE Trans. on VLSI Systems, Vol. 5, pp. 3-14, March 1997.
[KoKo97a] I. Koren and Z. Koren, "Analysis of a Hybrid Defect-Tolerance Scheme for High-Density Memory ICs," (pdf file) Proc. of the 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 166-174, October 1997.
[ChKo97] Z. Chen and I. Koren, "Crosstalk Minimization in Three-Layer HVH Channel Routing," (pdf file) Proc. of the 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 38-42, October 1997.
[ChKo97a] Z. Chen and I. Koren, "Three Layer Routing for Reliability Enhancement," (pdf file) International Journal on Microelectronics Systems Integration, Vol 5, No 4, pp. 209-219, Dec. 1997.
[ChKo97b] Z. Chen and I. Koren, "Technology Mapping for Hot-Carrier Reliability Enhancement," (pdf file) Proc. of the Microelectronics Manufacturing Yield, Reliability and Failure Analysis, SPIE'97, pp. 42-50, Austin, Texas, October 1997.
[ChKo96] Z. Chen and I. Koren, "Layer Reassignment for Antenna Effect Minimization in 3-Layer Channel Routing," (pdf file) Proc. of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 76-84, November 1996.
[VeKo96] A. Venkataraman and I. Koren, "Trade-offs between Yield and Reliability Enhancement," (pdf file) Proc. of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 67-75, November 1996.
[AlKo96] D. H. Albonesi and I. Koren, "A Mean Value Analysis Multiprocessor Model Incorporating Superscaler Processors and Latency Tolerating Techniques," (pdf file) International Journal of Parallel Programming, Vol. 24, Number 3, pp. 235-263, 1996.
[AlKo95] D. H. Albonesi and I. Koren, "Architecture and Technology Tradeoffs in the Design of Next-Generation Multiprocessor Servers," (pdf file) Proc. of the 7th IEEE Sympos. on Parallel and Distributed Processing, (SPDP'95), pp. 174-181, Oct. 1995.
[LaKo95a] P. Lalwaney and I. Koren, "Fault-Tolerance in Optically Interconnected Multiprocessor Networks," (pdf file) Fault-Tolerant Parallel and Distributed Systems, D. Pradhan and D. Avresky (Editors), pp. 91-98, IEEE Comp. Society Press, Los Alamitos, CA, 1995.
[LaKo95b] P. Lalwaney and I. Koren, "Fault-Tolerance Schemes for WDM-Based Multiprocessor Networks," (pdf file) Proc. of the 2nd Intern. Conference on Massively Parallel Processing using Optical Interconnections, pp. 90-97, Oct. 1995.
[WaKo95] I. A. Wagner and I. Koren, "An Interactive VLSI CAD Tool for Yield Estimation," (pdf file) IEEE Trans. on Semiconductor Manufacturing, Vol. 8, Special Issue on Defect, Fault, and Yield Modeling, pp. 130-138, May 1995.
[WaKo95b] I. A. Wagner and I. Koren, "The Effect of Spot Defects on the Parametric Yield of Long Interconnection Lines," (pdf file) Proc. of the 1995 IEEE Internl. Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 46-54, November 1995.
[YuKo95] K. Yu and I. Koren, "Reliability Enhancement of Real-Time Multiprocessor Systems through Dynamic Reconfiguration," (pdf file) Fault-Tolerant Parallel and Distributed Systems, D. Pradhan and D. Avresky (Editors), pp. 161-168, IEEE Computer Society Press, Los Alamitos, CA, 1995.
[IyKK95] B. Iyer, R. Karri and I. Koren, "Phantom Redundancy: A High-Level Synthesis Technique for Manufacturability," (pdf file) Proc. of ICCAD-95, The Internl. Conference on CAD, pp. 658-661, Nov. 1995.
[ChKo95] V.K.R. Chiluvuri and I. Koren, "Layout Synthesis Techniques for Yield Enhancement," (pdf file) IEEE Trans. on Semiconductor Manufacturing, Vol. 8, Special Issue on Defect, Fault, and Yield Modeling, pp. 178-187, May 1995 (Won the 1995 Best Paper Award of the IEEE Trans. on Semiconductor Manufacturing.).
[PhKo95] D.S. Phatak and I. Koren, "Complete and Partial Fault Tolerance of Feedforward Neural Nets," (pdf file) IEEE Trans. on Neural Nets , Vol. 6, pp. 446-456, March 1995.
[ChKo95] Z. Chen and I. Koren, "Techniques for Yield Enhancement of VLSI Adders," (pdf file) Proc. of ASAP 95 - the Internl. Conference on Application-Specific Array Processors, pp. 222-229, July 1995.
[ChKo95a] Z. Chen and I. Koren, "Layer Assignment for Yield Enhancement," (pdf file) Proc. of the 1995 IEEE Internl. Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 173-180, November 1995.
[ChKo94] Z. Chen and I. Koren, "A Yield Study of VLSI Adders," (pdf file) Proc. of the 1994 IEEE Internl. Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 239-245, Oct. 1994.
[AlKo94] D. H. Albonesi and I. Koren, "Tradeoffs in the Design of Single Chip Multiprocessors," (pdf file) Proc. of the 1994 IFIP WG 10.3 Workshop on Parallel Architectures And Compilation Techniques (PACT'94), pp. 25-34, Montreal, Canada, August 1994.
[LeKo94] R. Leveugle, Z. Koren, I. Koren, G. Saucier and N. Wehn, "The HYETI Defect Tolerant Microprocessor: A Practical Experiment and a Cost-Effectiveness Analysis," (pdf file) IEEE Trans. on Computers, Vol. 43, pp. 1398-1406, Dec. 1994.
[PhKo94] D.S. Phatak and I. Koren, "Hybrid Signed-Digit Number Systems: A Unified Framework for Redundant Number Representations with Bounded Carry Propagation Chains," (pdf file) IEEE Trans. on Computers, Special Issue on Computer Arithmetic, Vol. 43, pp. 880-891, August 1994.
[KKSt94] I. Koren, Z. Koren and C.H. Stapper, "A Statistical Study of Defect Maps of Large Area VLSI ICs," (pdf file) IEEE Trans. on VLSI Systems, Vol. 2, pp. 249-256, June 1994.
[ERKo93] D. Eisig, J. Rotstain and I. Koren, "The Design of a 64-bit Integer Multiplier/Divider Unit," (pdf file) Proc. of the 11th IEEE Symp. on Computer Arithmetic , pp. 171-178, June 1993.
[KKSt93] I. Koren, Z. Koren and C.H. Stapper, "A Unified Negative Binomial Distribution for Yield Analysis of Defect Tolerant Circuits," (pdf file) IEEE Trans. on Computers, Vol. 42, pp. 724-437, June 1993.
[MeKo92] B. Mendelson and I. Koren, "Estimating the Potential Parallelism and Pipelining of Algorithms for Data Flow Machines," Journal of Parallel and Distributed Computing, pp. 15-28, Jan. 1992.
[LZGK92] P. Lalwaney, L. Zenou, A. Ganz and I. Koren, "Optical Interconnects for Multiprocessors: Cost Performance Trade-Offs," Proc. of Frontiers '92: Symp. on The Frontiers of Massively Parallel Computation, pp. 278-285, Oct. 1992.
[ChKo92] W. Che and I. Koren, "Fault Spectrum Analysis for Fast Spare Allocation in Reconfigurable Arrays," (pdf file) Proc. of the 1992 IEEE Internl. Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 60-69, November 1992.
[KoKo91] Z. Koren and I. Koren, "A Model for Enhanced Manufacturability of Defect Tolerant Integrated Circuits," (pdf file) Proc. of the 1991 IEEE Internl. Workshop on Defect and Fault Tolerance in VLSI Systems, pp. 81-92, November 1991.
[KoKo91] I. Koren and Z. Koren, "Discrete and Continuous Models for the Performance of Reconfigurable Multistage Systems," (pdf file) IEEE Trans. on Computers , pp. 1024-1033, Vol. 40, Sept. 1991.
[KoZi90] I. Koren and O. Zinaty, "Evaluating Elementary Functions in a Numerical Co-Processor Based on Rational Approximations,'' (pdf file) IEEE Trans. on Computers, Special Issue on Computer Arithmetic, Vol. 39, pp. 1030-1037, August 1990.
[KoSi90] I. Koren and A.D. Singh, "Fault Tolerance in VLSI Circuits," (pdf file) Computer, Special Issue on Fault-Tolerant Systems, Vol. 23, pp. 73-83, July 1990.
[KoSt89] I. Koren and C.H. Stapper, "Yield Models for Defect Tolerant VLSI Circuits: A Review," (pdf file) Defect and Fault Tolerance in VLSI Systems, Vol. 1, I. Koren (ed.), pp. 1-21, Plenum, 1989. (Reprints of this and five other papers in this list appear in Manufacturing Yield Evaluation of VLSI/WSI Systems, B. Ciciani (editor), IEEE Computer Society Press, Los Alamitos, 1995.)
[WKCe89] S. Wimer, I. Koren and I. Cederbaum, "Optimal Aspect Ratios of Building Blocks in VLSI," (pdf file) IEEE Trans. on Computer-Aided Design, Vol. 8, pp. 139-145, Feb. 1989.
[KMPS88] I. Koren, B. Mendelson, I. Peled and G.M. Silberman, "A Data-Driven VLSI Array for Arbitrary Algorithms," (pdf file) Computer, Vol. 21, pp. 30-43, October 1988.
[WKCe88] S. Wimer, I. Koren and I. Cederbaum, "Floorplans, Planar Graphs and Layouts," (pdf file) IEEE Trans. on Circuits and Systems , Special Issue on "Computational Graph Theory: Algorithms and Applications," Vol. 35, pp. 267-278, March 1988.
[Koren88] I. Koren, "The Effect of Scaling on the Yield of VLSI Circuits," (pdf file) Yield Modelling and Defect Tolerance in VLSI, W.R. Moore, W. Maly and A. Strojwas (Eds.), pp. 91-99, Adam Hillger Ltd., 1988.
[WiKo88] S. Wimer and I. Koren, "Analysis of Strategies for Constructive General Block Placement," (pdf file) IEEE Trans. on Computer-Aided Design , Vol. 7, pp. 371-377, March 1988.
[BeKo87] M. Berg and I. Koren, "On Switching Policies for Modular Fault-Tolerant Computing Systems," (pdf file) IEEE Trans. on Computers, Vol. C-36, pp. 1052-1062, Sept. 1987.
[ErKo88] P. Erdos, I. Koren, S. Moran, G.M. Silberman and S. Zaks, "Minimum-Diameter Cyclic Arrangements in Mapping Data-Flow Graphs onto VLSI Arrays," (pdf file) Mathematical Systems Theory, Vol. 21, No. 2, pp. 85-98, 1988.
See here the list of holders of Paul Erdos numbers.
[GKS84] D. Gordon, I. Koren and G.M. Silberman, "Embedding Tree Structures in VLSI Hexagonal Arrays," (pdf file) IEEE Trans. on Computers, Vol. C-33, pp. 104--107, Jan. 1984.
[AlKo82] D. Aljadeff and I. Koren, "A Microprocessor-based Hardware Monitor for Performance Evaluation of Computer Systems," (pdf file) Microsystems: Architecture and Integration, EUROMICRO 82, C.J. van Spronsen and L. Richter (eds.), North-Holland, pp. 123-130, 1982.
[Kore81] I. Koren, "A Reconfigurable and Fault-Tolerant VLSI Multiprocessor Array," (pdf file) Proc. of the 8th Annual Symp. on Computer Architecture, pp. 425-441, May 1981.
[KoMa78] I. Koren and Y. Maliniak, "A Unified Approach to a Class of Number Systems," (pdf file) Proc. of the 4th IEEE Symp. on Computer Arithmetic, pp. 25-28, October 1978.
Israel Koren
koren 'at' euler.ecs.umass.edu
koren 'at' euler.ecs.umass.edu