Biography

Israel Koren received the B.Sc., M.Sc. and D.Sc. degrees from the Technion - Israel Institute of Technology, Haifa, in 1967, 1970, and 1975, respectively, all in Electrical Engineering. He is currently a Professor of Electrical and Computer Engineering at the University of Massachusetts, Amherst. Previously he held positions with the Technion - Israel Institute of Technology, Haifa, the University of California at Berkeley, the University of Southern California, Los Angeles and the University of California, Santa Barbara. He has been a consultant to several companies including Analog Devices, AMD, Digital Equipment Corp., IBM, Intel, National Semiconductor and Tolerant Systems.

Dr. Koren's current research interests are Fault-Tolerant Systems, VLSI Yield and Reliability, Secure Cryptographic Systems, and Computer Arithmetic. He publishes extensively and has over 200 publications in refereed journals and conferences. He is an Associate Editor of the IEEE Transactions on VLSI Systems, the VLSI Design Journal, and the IEEE Computer Architecture Letters. He has been a Co-Guest Editor for several IEEE Transactions on Computers special issues on Fault Diagnosis and Tolerance in Cryptography, Sept. 2006, on Computer Arithmetic, July 2000, and on High Yield VLSI Systems, April 1989. He served on the Editorial Board of these Transactions during 1992-1997. He also served as General Chair, Program Chair and Program Committee member for numerous conferences. He has edited and co-authored the book, Defect and Fault-Tolerance in VLSI Systems, Vol. 1, Plenum, 1989. He is the author of the textbook Computer Arithmetic Algorithms, Second Edition, A. K. Peters, Natick, MA, 2002. He is a co-author of the textbook Fault-Tolerant Systems,, Morgan-Kaufman, San Francisco, CA, 2007. Dr. Koren is a Fellow of the IEEE.

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Research Interests

Research is being conducted in the following directions (the pointers in brackets indicate the relevant publications in the list below or follow the link to Prior Publications):

Fault-Tolerant Systems: [KoKr07], [ZLKK07] [UnKo03], [DuKK01], [HLKK00], [ACDH00], [KKKr98], [YuKo95].

Power and Temperature Aware Systems: [HKK07], [WGKK06], [GKK05], [UnKo03], [URKK01].

Secure Cryptogrpahic devices: [BNK07}, [BBKMP03a], [BBKMP03b], [BBKMP03].

Defect and fault tolerance [ChKo04], [SiKo03], [KoKo00].

Digital computer arithmetic: [Kore02], [WoKo05], [KKO03], [PhGK01], [PhKo99].

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Selected List of Recent Publications (copyright note):

[KoKr07] Textbook: I. Koren and C. M. Krishna, Fault-Tolerant Systems,, Morgan-Kaufman, San Francisco, CA, 2007.

[Kore02] Textbook: I. Koren, Computer Arithmetic Algorithms, Second Edition, A. K. Peters, Natick, MA, 2002.

[ZLKK07] Y. Zhou, V. Lakamraju, I. Koren and C.M. Krishna, "Software-Based Failure Detection and Recovery in Programmable Network Interfaces,"(pdf file) to appear, IEEE Trans. on Parallel and Distributed Systems, 2007.

[BKM07] L. Breveglieri, I. Koren and P. Maistri, "An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers," (pdf file) IEEE Trans. on Computers, pp. 635-649, May 2007.

[HKK07] Y. Han, I. Koren and C. M. Krishna, "TILTS: A Fast Architectural-Level Transient Thermal Simulation Method," (pdf file) Journal of Low-Power Electronics, pp. 13-21, Vol. 3, April 2007.

[WGKK06] H. Wang, Y. Guo, I. Koren and C. M. Krishna, "Compiler-Based Adaptive Fetch Throttling for Energy Efficiency," (pdf file) Proc. of ISPASS'06 - IEEE International Symposium on Performance Analysis of Systems and Software, pp. 112-119, Mar. 2006.

[GKK05] A. Goel, I. Koren and C. M. Krishna, "Energy Aware Kernel for Hard Real-Time Systems," (pdf file) Proc. of the IEEE Conf. on Compilers, Architectures for Embedded Systems - CASES 2005, pp. 185-190, Sept. 2005.

[WoKo05] Z. Wo and I. Koren, "Synthesis of Saturating Counters Using Traditional and Non-traditional Basic Counters,"(pdf file) Proc. of the 17th IEEE Symp. on Computer Arithmetic, pp. 114-121, June 2005.

[ChKo04] G. Chapman, Y. Audet, S. Djaja, D. Cheung, I. Koren and Z. Koren, "Self-Correcting Active Pixel Sensor using Hardware and Software Correction,"(pdf file) IEEE Design & Test of Computers, pp. 544-551, Nov. 2004.

[SiKo03] M. Singh and I. Koren, ``Fault Sensitivity Analysis and Reliability Enhancement of Analog-to-Digital Converters," (pdf file) IEEE Trans. on VLSI Systems, pp. 839-852, Nov. 2003.

[UnKo03] O.S. Unsal and I. Koren, "System-Level Power-Aware Design Techniques in Real-Time Systems," (Invited paper) (pdf file) Proceedings of the IEEE, pp. 1055-1069, July 2003.

[BBKMP03a] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri and V. Piuri, "Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm," (pdf file), Proc. of ASAP'03 - the Internl. Conference on Application-Specific Systems, Architectures and Processors, pp. 423-432, June 2003.

[BBKMP03b] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri and V. Piuri, "Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard," (pdf file), Proc. of the 2003 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 105-113, Nov. 2003.

[KKO03] I. Koren, Y. Koren and B. Oomman, "Saturating Counters: Application and Design Alternatives," (ps file), (pdf file), Proc. of the 16th IEEE Symp. on Computer Arithmetic, pp. 228-235, June 2003.

[BBKMP03] G. Bertoni, L. Breveglieri, I. Koren, P. Maistri and V. Piuri, "Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard," (pdf file), IEEE Trans. on Computers, pp. 492-505, April 2003.

[LAKK02] V. Lakamraju, I. Koren and C.M. Krishna, "Filtering Random Networks to Synthesize Interconnection Networks with Multiple Objectives," (pdf file) IEEE Transactions on Parallel and Distributed Systems, pp. 1139-1149, October 2002.

[URKK01] O. Unsal, A. Raksit, I. Koren, C. M. Krishna, and C.A. Moritz, "Cool Cache for Hot Multimedia," (pdf file) Proc. of MICRO'34, The international Sympo. on Microarchitecture , pp. 274-283, Dec. 2001.

[PhGK01] D.S. Phatak, T. Goff and I. Koren, "Constant-time Addition and Simultaneous Format Conversion Based on Redundant Binary Representations," (pdf file) IEEE Trans. on Computers , pp. 1267-1278, Nov. 2001.

[DuKK01] G. Durairaj, I. Koren and C.M. Krishna, "Importance Sampling to Evaluate Real-Time System Reliability: A Case Study," (pdf file) Simulation , vol. 76, no. 3, pp. 172-183, March 2001.

[KoKo00] I. Koren and Z. Koren, "Incorporating Yield Enhancement into the Floorplanning Process," (ps file) IEEE Trans. on Computers, Special Issue on Defect Tolerance in Digital Systems , Vol. 49, pp. 532-541, June 2000.

[HLKK00] J. Haines, V.R. Lakamraju, I. Koren and C.M. Krishna, "Application-Level Fault Tolerance as a Complement to System-Level Fault Tolerance," (pdf file) The Journal of Supercomputing, Special Issue on ``Embedded Fault-Tolerant Computing Systems," Vol. 16, pp. 53-68, Kluwer Academic Publishers, MA, 2000.

[ACDH00] M. Allalouf, J. Chang, G. Durairaj, J. Haines, V.R. Lakamraju, K. Toutireddy, O.S. Unsal, K. Yu, I. Koren and C.M. Krishna, "The RAPIDS Simulator: A Testbed for Evaluating Scheduling, Allocation, and Fault-Recovery in Distributed Real-Time Systems," (pdf file) Dependable Network Computing, D. Avresky (Editor), pp. 413-431, Kluwer Academic Publishers, MA, 2000.

Selected List of Prior Publications

Patents and patent applications:
Active pixel with built in self-repair and redundancy
Reducing processor energy consumption using compile-time information
Controlling a processor resource based on a compile-time prediction of number of instructions-per-cycle that will be executed across plural cycles by the processor

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Recent Professional Activities

Associate Editor of IEEE Computer Architecture Letters, 2006 - Present

Associate Editor of VLSI Design Journal, 2006 - Present

Associate Editor of IEEE Trans. on VLSI Systems, 2001 - 2007

IEEE Transactions on Computers, Co-Guest Editor, Special Issue on Fault Diagnosis and Tolerance in Cryptography, June 2006

Co-General Chair, FDTC 2005 and FDTC 2006 - Fault Diagnosis and Tolerance in Cryptography, August 2005 and October 2006

General Chair, 17th IEEE Symposium on Computer Arithmetic, June 2005

IEEE Transactions on Computers, Co-Guest Editor, Special Issue on Computer Arithmetic , July 2000

Program Committee Co-Chair, 14th IEEE Symposium on Computer Arithmetic

Program Committee member, 13th International Parallel Processing Symposium, IPPS/SPDP '99, Puerto Rico, April 1999

Associate Editor of IEEE Trans. on Computers, 1992 - 1997

General Chair, 1996 International Conference on Parallel Architectures and Compilation Techniques (PACT'96), Boston, MA, October 21-23, 1996

General Chair, 1996 IEEE Symposium on Defect and Fault Tolerance in VLSI Systems, Boston, MA, November 6-8, 1996

Program Committee Chair, 1995 IEEE Workshop on Defect and Fault Tolerance in VLSI Systems, Lafayette, LA, November 1995

Program Committee member, the 1993, 1995, 1997, 2001 and 2003 (11th - 16th) IEEE Symposiums on Computer Arithmetic

Program Committee member, 1992- 1997 and 2000 - 2003 International Conferences on Application-Specific Systems, Architectures and Processors (ASAP)

Program Committee member, 2000 and 2001 IEEE International Workshop on Memory Technology, Design, and Testing

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Current Research Projects

· Fault-tolerant and Power-aware Systems
· Yield and Reliability of VLSI Circuits
· Fault-tolerant Sensor Networks

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Simulators
Collections of online simulators created by students who have taken my classes.

· Computer Arithmetic Algorithms Simulator
· Computer Architecture Educational Tools
· Fault Tolerant Computing Simulator

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Courses

· Fault Tolerant Computing
· Computer Architecture
· Digital Computer Arithmetic
· Computer Systems Lab II
· Special Topics: Design for Manufacturability and Reliability of VLSI Circuits
· "FP'Arithmetic 97", a course on Floating-Point Arithmetic with William Kahan (UC Berkeley), at Sun, Mountain View, CA, June 1997 ( Picture 1, Picture 2).

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Department, University and Town

· Department of Electrical and Computer Engineering
· University of Massachusetts
· Directions and maps to the University

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My family

· My wife, Zahava Koren
· My older son, Yuval Koren, is the CEO of Eye-Fi, a startup company in Menlo Park, CA.
· My younger son, Yaron Koren is self-employed, New York, NY.

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