Lab Projects

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The lab projects for this course are based on the Intel IXP1200 network processor. The evaluation platforms are made available to us through a donation from the Intel IXA University Program.

Lab Hardware

The IXP1200 network processor is a chip-multiprocessor with six microengines for packet processing and one control processor. It is augmented by several packet processing specific components. The evaluation board has four 100 Mb/s Ethernet interfaces through which packets can be sent and received. The hardware and software architecture will be explained in detail in class. The following pictures shows the evaluation board:

Lab Projects

 There are three labs that will be implemented:

bulletLab 1: TCP/IP Flow Identification. In this lab, a software environment is used to implement a TCP/IP flow identification algorithm. See the Lab 1 web page for instructions.
bulletLab 2: IPv4 Forwarding and Classification on IXP1200. In this lab, the IXP1200 Simulator will be explored using a given IPv4 forwarding code. Then the packet forwarding framework is extended to implement simple layer 4 packet classification. See the Lab 2 web page for instructions.
bulletLab 3: Bridging and Forwarding Performance of IXP1200. In this lab, the throughput performance of the IXP1200 is measured. Different applications (bridging and forwarding) are compared and the difference between fast path and slow path performance is illustrated. See the Lab 3 web page for instructions.

Pictures

The struggle with the IXP1200 hardware in Lab 3:


Shulin, Nathir, and Yang


Feng


Silpa


Lilian

2003 by Tilman Wolf