Reconfigurable Computing Applications

The inherent parallelism and specialization offered by reconfigurable architectures, such as FPGAs, have allowed the mapping of a new class of algorithms to these architectures. To date, we have developed dynamically-reconfigurable FPGA systems in the communications and remote sensing areas. An adaptive Viterbi decoder has been mapped a Xilinx XC4036 on a PCI-bus based Annapolis Microsystems WildOne board. This system has been used to decode sets of communicated data. A dynamically reconfigurable turbo decoder has been mapped to an Altera Stratix-based NIOS Development Board. This system uses dynamic reconfiguration to save decoder power. A remote sensing data acquisition system has developed and deployed in a remote SAR system. This system combines FPGAs with a disk interface, microcontroller, and network interface to provide a comprehensive data acquisition environment.

Power-Efficient Turbo Decoding

The development of turbo codes has allowed for near-Shannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate decoding techniques, the circuit complexity and power consumption of turbo decoder implementations can often be prohibitive for power-constrained systems. To address these issues, we have developed a reduced-complexity turbo decoder specifically optimized for contemporary FPGA devices. Our key power-saving technique is the use of decoder run-time reconfiguration in response to variations in the channel conditions. If less favorable channel conditions are detected, a more powerful, less power-efficient decoder is swapped into the FPGA hardware to maintain a fixed bit error rate. More favorable channel conditions result in the opposite effect. Through experimentation on a Stratix-based NIOS Development Board we show that dynamic reconfiguration can result in a 52% power reduction versus a static decoder implementation. Comparisons with contemporary microprocessors illustrate a 100x  performance improvement.

1.      J. Liang, R. Tessier, and D. Goeckel, A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder, in the Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, California, April 2004. pdf

Adaptive Viterbi Decoding

In recent years, the addition of systematic redundancy to the transmitted information in the form of error-control coding has proved to be a potential way to overcome channel disturbances that produce errors, in digital communication systems. However, with the evolution of error-control codes such as the convolutional codes, the complexity of the corresponding decoders has also been increasing. The function of such a decoder is to find a codeword that most closely resembles the received input sequence. The Viterbi algorithm (VA), which is one of the most extensively employed decoding algorithms, works well for codes with short constraint length K. But its memory requirement and number of computations poses a big obstacle when decoding codes with larger constraint lengths. In order to overcome this problem the concept of adaptive Viterbi decoding algorithm (AVA) was developed .

In this project a modified Adaptive Viterbi Algorithm has been designed. As in the Adaptive Viterbi algorithm , the modified algorithm also does not examine all possible states of the trellis levels, thus reducing the memory, computational, and power requirements.

  1. R. Tessier, S. Swaminathan, R. Ramaswamy, D. Goeckel, and W. Burleson, A Reconfigurable, Power-Efficient Adaptive Viterbi Decoder, in IEEE Transactions on VLSI Systems, vol. 13, no. 4, April 2005, pp. 484-488. postscript, pdf
  2. S. Swaminathan, R. Tessier, D. Goeckel, and W. Burleson, A Dynamically Reconfigurable Adaptive Viterbi Decoder , in the Proceedings of the 10th International ACM/SIGDA Symposium on Field Programmable Gate Arrays, Monterey, California, February 2002. pdf

 

Acquisition of Remote Sensing Data

In this project, a complete data acquisition system, including A/D converters, FPGAs, IDE disk interface, microcontroller, and 100 Mbps Ethernet interface has been developed. The system was recently used to acquire ocean current data aboard a P3 weather-sensing aircraft.

 

  1. G. Farquharson, W. Junek, A. Ramanathan, S. Frasier, R. Tessier, D. McLaughlin, M. Sletten, and J. Toporkov, A Pod-Based Dual-Beam InSAR, in IEEE Transactions on Geoscience and Remote Sensing Letters, vol 1, no. 2, April 2004, pp. 62-65. postscript, pdf

 

This work is currently being extended as part of the UMass Engineering Research Center. Additional information on this project can be found here.