Overview

FPGAs are being used in a wide variety of embedded applications at enhanced levels of security. In our research we have explored FPGA security at the system, application, and devices levels. At the system level, we consider the security of crytography primitives, such as AES, that are embedded within an FPGA. Graph matching algorithms can be used to identify structures in the FPGA netlist, giving attackers a weak point for Trojan insertion.

Several of our papers have explored the possibility of using FPGA hardware resources to obfuscate soft microprocessor instructions. Hardware functions are used to decode and decrypt instructions after they enter the FPGA fabric. In our recent IEEE Transactions on Computers paper we offer one of the first numerical obfuscation metrics that can be used to quantify the amount of obfuscation that is provided. The hardware overhead of these protection approaches are limited and they can be augmented with known software obfuscation techniques.

What's New