In this lab, we will connect the PIC to a PLD that will act as coprocessor to the PIC. You will develop an external bus interface that allows for reliable communication between the devices. This is the first step to building a complete PIC system that includes external memory (Lab 3). In addition to the bus interface, we will use a timer interrupts to control the periodic task of toggling of an LED. This will test the robustness of the bus implementation as processing can get interrupted at any time. In addition to developing PIC assembler code, you will need to implement significant amounts of functionality in the PLD. You may use VHDL, Altera schematics, or any other development tool of your choice for this purpose.
For this lab you must complete the following tasks.
1. Increment: write value to address 0x1 and read incremented value from 0x2.
2. Bit count: write value to address 0x3 and read the number of 1-bits in byte from 0x4.
3. Maximum: write value to address 0x5 and the read maximum written to 0x5 since power-up from 0x6.
You can assume that writes to result addresses (0x2, 0x4, 0x6) are ignored (i.e., return 0x0). Reads from addresses that contain values that were previously written should yield these values. Reads and writes to other addresses should not occur and can be handled arbitrarily.
4. The main program of the PIC should do the following:
∑ For the addresses 0x1, 0x3, 0x5 (in that order), read the COUNTER value and write it to the respective address. Please read the counter value every time before writing to the PLD.
∑ For each implemented function (increment, bit count, maximum) read the appropriate value and print one line on the terminal with the values of the argument and the result. For example: ďBit count of 0x4 is 0x1Ē. For the printing, all values should be read from the PIC. You can choose the way you print the result as long as itís clearly what it means.
∑ Repeat printing these three lines indefinitely.
During the demo, your PIC should continuously communicate with the PLD, exchange data and results, and print these on the terminal. The main focus of this lab is on the bus. Itís more important that your system has a reliable bus interface than a fancy co-processor function. You should be able to explain the results that are printed on the screen.
You must provide a logic analyzer demo of the bus transactions. You may set up your lab to show the bus transactions on the logic analyzer live or show previously generated printouts.
Things to keep in mind
Often it may appear that hardware is not working the way that is expected. An initial reaction would be to assume that the hardware is broken and needs to be replaced. Before going to find the TA keep the following questions in mind:
Same lab report guidelines as for Lab 1. Please include an annotated logic analyzer printout.
 The capabilities of our PLD are very limited. Depending on how you implement the state machine, etc., there might not be enough room for all the functions listed. For this lab you must at least implement the bit count function. The other functions are optional, but the more you can implement the more interesting the lab will be (and it is only a bit more effort).