Efficient Memory Encryption and Integrity Checking

A complete hardware solution for embedded systems that fully protects off-chip memory has been developed as part of this research. Our security core is based on one-time pad (OTP) encryption and an integrity check module. These modules safeguard external memories for embedded processors against a series of well-known attacks, including replay attacks, spoofing attacks and relocation attacks. The implementation limits memory space overhead to 18.25 or 32.75%. It also reduces memory latency from 22 cycles for an alternate approach to 11 or 3 clock cycles depending on desired performances. The loss for software execution with our solution is only 10% compared with a non-protected solution. A FPGA-based implementation of the security core has been completed to gauge the security overhead and to compare our approach with existing solutions.

R. Vaslin, G. Gogniat, J.-P. Diguet, E. Wanderley, R. Tessier and W. Burleson, A Security Approach for Off-Chip Memory in Embedded Microprocessor Systems, in Journal of Microprocessors and Microsystems, vol. 33, no. 1, February 2009, pp. 37-45.

R. Vaslin, G. Gogniat, J.-P. Diguet, R. Tessier, D. Unnikrishnan, and K. Gaj, Memory Security Management for Reconfigurable Embedded Systems, in the Proceedings of the IEEE International Conference on Field-Programmable Technology, Taipai, Taiwan, December 2008.