Adding Third-level Data Cache

Adding Third-level Data Cache (dl3) and Instruction Cache (il3)

Overview:

The purpose of this lab is to get familiar with cache hierarchical structure and its implementation in SimpleScalar. You need to modify the C/C++ source code in sim-cache.c file to add a third-level data cache and a third-level instruction cache. After you modify the code, recompile it using command:
make

you will get new simulation tool: "sim-cache" with extended functionality. You need to use the two provided configuration files (lab3_cache1.cfg and lab3_cache2.cfg) on test-math to test if your implementation is correct. Use the following command

/simplesim-3.0/./sim-cache -config lab3_cache1.cfg -redir:sim sim_lab3_cache1.out ./test-math

Here is the simulation output file sim_lab3_cache1.out when running simulation using configuration lab3_cache1.cfg on test-math

Hints:

There are many source files related to generating simulation tool "sim-cache", such as main.c, cache.h, cache.c, sim-cache.c etc. For this lab, you only need to modify sim-cache.c to add level-3 caches

some related functions in sim-cache.c:

sim_reg_options(struct opt_odb_t *odb): /* register simulator-specific options*/
sim_check_options(...): /* check simulator-specific option values */
sim_reg_stats(struct stat_sdb_t *sdb): /* register simulator-specific statistics */
dl1_access_fn(...): /* l1 data cache l1 block miss handler function */
dl2_access_fn(...): /* l2 data cache l2 block miss handler function */
il1_access_fn(...): /*l1 inst cache l1 block miss handler function */
il2_access_fn(...): /*l2 inst cache l2 block miss handler function */
sim_main(void):/*start simulation, program loaded, processor precise state initialized */

Take printout of this file and mark the above functions. Then go through them one by one and see how IL1 , IL2, DL1 and DL2 are implemented in these functions. Also pay attention to variables that are declared above these functions and are used in these functions. This is how i was able to do it.

you should describe how to implement a level-3 instruction cache and a level-3 data cache in SimpleScalar. You should also attach the modified source code : sim-cache.c, and mark the place where you make modification. Run simulations using provided simulation configuration file(lab3_cache1.cfg and lab3_cache2.cfg ), for each run you should submit one output file as described in Overview.