Half Day & Full Day Tutorials Presented at Conferences

 

·         Sandip Kundu and Andreas Kuehlmann, “Verification & Test of Hardware in Practice”, European Design Automation Conference (EURO-DAC), Geneva, Switzerland, 1996

·         Sandip Kundu, Anirudh Devgan and Leon Stok, “Timing Analysis: from devices to systems”, International Conference on Computer-Aided Design, San Jose, 1997

·         Sandip Kundu, Rob Roy and Yerevant Zorian, “Embedded core testing”, VLSI-98, Chennai, India, 1998

·         Sandip Kundu and Anirudh Devgan, “Timing Analysis: from devices to systems”, Asia Pacific Design Automation Conference, Yokohama, Japan, 1998

·         Sandip Kundu, “IDDQ Testing for engineers”, Asian Test Symposium, Singapore, 1998

·         Sitaram Yadavalli, Sandip Kundu, Sanjay Sengupta, Rajesh Galivanche, “Testing and Design-for-Test (DFT) for Practicing Engineers”, Design Automation and Test in Europe (DATE), Munich, Germany, 1999

·         Sandip Kundu and Sreejit Chakravarty, “Test Challenges for Nano-Meter Designs”, European Test Workshop, Constance, Germany, 1999

·         Sandip Kundu and Rajesh Galivanche, “Test Challenges in Nanometer Technologies”, European Test Workshop, Stockholm, Sweden, 2001

·         Sandip Kundu, "Testing for Circuit Marginalities", International Test Synthesis Workshop, Santa Barbara, 2004

·         Sandip Kundu, “On Testing Circuit Marginalities”, International Test Conference, Austin, TX, 2005

·         Sandip Kundu, “On Testing Circuit Marginalities”, Design Automation and Test in Europe, Munich, 2006

·         Sandip Kundu, “On Testing Circuit Marginalities”, VLSI Test Symposium, Berkeley, 2006

·         Sandip Kundu, “Dealing with VLSI Design and Circuit Marginalities during Test,” VLSI Society of India sponsored education course, Calcutta, India, 2006

·         Sandip Kundu, “Design for Manufacturability and Reliability,” VLSI Society of India sponsored education course, Calcutta, India, 2007