# FILE: pinlist.pl # AUTHOR: Ben Doherty # # DESCRIPTION: Extract a pinlist from a verilog module and echo # the output in a format suitable for C+P'ing into a cadence # pin list dialog use strict; use Data::Dumper qw(Dumper); my $module = shift @ARGV; die "No module defined!" unless $module; my $inmodule = 0; my $inpdef = 0; my %ports; while (<>) { my $line = chomp; if ($inmodule) { if (!/;/) { $inpdef = 0; } else { $inpdef = 1; } if (/(input|output)\s*(?:\[(\d+):(\d+)\])?\s*([^;]+)/) { my $ref = {}; if (exists $ports{$1}) { $ref = $ports{$1}; } else { $ports{$1} = $ref; } my @names = split ',', $4; foreach my $name (@names) { $ref->{$name} = {}; if (defined $2 && defined $3) { $ref->{$name}->{'top'} = $2; $ref->{$name}->{'bot'} = $3; } } } } elsif (/module $module/) { $inmodule = 1; } elsif (/endmodule/) { $inmodule = 0; } } foreach (keys %ports) { my $type = $_; my $ref = $ports{$type}; print "$type: "; foreach my $name (sort keys %$ref) { $name =~ s/\s+//g; if(exists $ref->{$name}->{'top'}) { for(my $i = $ref->{$name}->{'top'}; $i >= $ref->{$name}->{'bot'}; $i--) { print "$name"."[$i] "; } } else { print "$name "; } } print "\n"; }