In the last two decades, digital design has been greatly influenced by hardware description languages (HDL). First, design entry, then simulation and synthesis were affected by HDLs and became even more important parts of a design process. Digital system test, however, has not been affected as much by HDLs. This is in spite of the potential that exists in HDLs due to handling of concurrency, data representation, and simulatability features. Some of the areas that digital system test can benefit from HDLs are implementation of test methodologies, testability analysis, test data representation, test database standardization, and test architecture design. Other new avenues are yet to be explored.

We are dedicating a session of NATW 2001 for HDLs in Test. This session is organized to look at existing test applications of HDLs and HDL based environments, as well as potentials of HDLs for test applications. We are looking for papers on existing test synthesis, testbench generation tool, testability insertion tools, test data representations, as well as research papers on HDLs in fault simulation, fault dictionary representation, test methodology implementation, testability analysis methods, random test generation techniques, and any other test related application that HDLs can play a role.