ECE 558: Introduction to VLSI Design
ECE 658: VLSI Design Principles

Professor Wayne P. Burleson

Office Hours: Tu 1-2, Th 3-4 pm
Knowles Engineering Building, 309
burleson@ecs.umass.edu end_of_the_skype_highlighting

Class: Tu, Th 11:15AM – 12:30PM, Classroom: Marston 132

Teaching Assistants: 

• Xiaolin Xu: xu@ecs.umass.edu
• Justin Lu: jlu@ecs.umass.edu

TA Office Hours: Mo 3-5, Tu 3-5 7-9, We 3-5 7-9 (pm), Marston 134

Textbook (Required): CMOS VLSI Design: A Circuits and Systems Perspective, 4^th Edition, Neil Weste, David Harris, Addison Wesley, 2010 ISBN 978-0321547743. Web Page for the book including Powerpoint and PDF of all slides

Supplementary Readings:

· Design of High Performance Microprocessor Circuits, A. Chandrakasan, W. Bowhill, F. Fox, IEEE Press, 2000, ISBN 078036001-X

· Digital Integrated Circuits, Jan M. Rabaey, Anantha P. Chandrakasan, Borivoje Nikolic, Pearson Education,Prentice Hall, 2nd Edition, 2003, ISBN 0130909963.

· Digital Integrated Circuits: Analysis and Design, 3rd Edition,Sung-Mo Kang,Yusuf Leblebici,McGraw-Hill, 2002, ISBN:0071196447

· Chip Design for Submicron VLSI: CMOS Layout and Simulation,1st Edition, John P. Uyemura, Thomson,2005,ISBN:053446629X

Course Objectives:

This is a first course in VLSI Systems and Design.  At the completion of this course, a student is expected to be able to design and analyze digital circuits, understand transistor operations, circuit families, area-power-performance analysis, layout design techniques, signal integrity analysis, memory design and clocking issues.  Students are also expected to understand various design methodologies such as custom, semi-custom, standard cell, arrayed logic, sea-of-gates.

Course Description

(4 credits) The course will cover basic theory and techniques of digital VLSI design in CMOS technology. Topics include: CMOS devices and circuits, fabrication processes, static logic structures, chip layout, simulation and testing, low power techniques, design tools and methodologies, VLSI architecture. We use full-custom techniques to design basic cells and regular structures such as data-path and memory arrays. There is an emphasis on modern design issues in power, interconnect and clocking. We will also use several case-studies to explore recent real-world VLSI designs and papers from the recent research literature. Students will design and verify small test circuits using commercial CAD tools. Some final project designs may be fabricated and returned for testing.

Prerequisites: A basic knowledge of digital logic design (e.g. Engin 112), RLC circuits (eg. ECE 212) and MOS circuits (eg. ECE 323).

Grading: Labs (30%), midterm exam (30%), and a final exam (40%).

Honesty Policy: Consultation with fellow students is encouraged, especially on design issues. However, directly copying another student's work defeats the purpose of the assignments and is an honor code violation. In addition, any collaborations or use of materials from previous courses, texts, solution manuals or advice from others should be clearly stated in the homework or lab report. Give credit where credit is due! Be honest about your own abilities and accomplishments!

For 658 students: If you are a grad student you should take 658. You can not take both 558 and 658. For 658, there will be additional readings and additional or alternate problems on homework, labs and exams which require more sophisticated and creative solutions.

Computer Requirements: The default CAD tools for all students are Cadence and Synopsys electronic design automation tools. An example flow and a tutorial on the use of these tools are available at the TA Page. Since all the tools are Unix based, they can be accessed using any X-server program from machines running on MS Windows.

Topics:

• Introduction to VLSI; CMOS; design metrics
• Combinational logic, layout, design rules
• Manufacturing process; 
• CMOS Transistor; Inverter;
• Low Power design strategies
• Circuit families;  Static and Dynamic
• Sequential Circuits
• Clocking and Synchronization
• Deep sub-micron designs; design for performance
• Wires 
• Adders, Multipliers, data paths
• Memory
• Emerging topics; On-chip Sensors, Variability and Hardware Security
• CMOS system design, Floor plan, Placement and routing, Project design

Homeworks: There will be about four homework assignments which allow you to practice your analytical skills. Most of these will require the use of the SPICE circuit simulators.

Labs : There will be four lab projects which allow you to practice your design skills using computer aided design tools. These labs are a substantial and memorable ;) part of the course. A variety of CAD tools will be used for design and simulations. Lab 4 will be a final project which will be worth double the value of the other labs. Note that each lab builds on the previous ones.

• Lab 1: Designing and simulating a CMOS compound gate
• Lab 2: Designing a cell of an arithmetic unit
• Lab 3: Design of a regular datapath structure
• Lab 3: Final Project (TBD)

UMass Calendar: http://www.umass.edu/registrar/gen_info/academic_calendar.htm