ECE 558 Introduction to VLSI Design
ECE 658 VLSI Design Principles
Lecture 4 (Fall 2006)
:- pdf
VLSI in the News: This week in EE Times
CMOS Process and Layout
- CMOS Process and Layout
- Here is a link for the MOSIS service
that provides fabrication services for universities like us. You can find
out about design rules, tools and fabrication issues. Here is a link for
the NTRS
roadmap handout
- Processing Steps: Chapter 2
from textbook. (pp35-65)
- Layout styles: Color Plates
from textbook
- Design Rules: Rabaey's design
rules (covered in color plates in book)
- MOSIS
scalable design rules
Coming up in next lecture
- Semiconductor Devices: A
review for CMOS VLSI (be prepared by reading pp.73-130 before the lecture)