ECE 558 Introduction to VLSI Design
ECE 658 (NTU IC740-A) VLSI Design
Principles
Lecture 20 (Fall 2006)
Announcements
- Exam 2: Tuesday evening 7-9pm
in ECSC0119 (same exam 1 location), coverings Lectures 1-20 and HW1-HW4
- Homework 4 is due today in class.
Make sure you get back HW3 and HW4 solutions before exam
- Lab 4 for undergrads is
posted and is due midnight before the last lecture of the semester.
Exam Review
- Practice exam from last
year’s exam handed out in lecture.
- Exam Format: CLOSED BOOK,
CLOSED NOTES except three 8.5x11 sheets of notes (both sides)
- Some topics you can be sure
will be on the exam: Power estimation and optimization, Flip-flops (both
function and timing), Datapath design and
area/speed estimation, hierarchical schematics Interconnects. Timing.
- Other topics worth betting
on: PLA design, Carry propagation, Interconnect delay estimation, Driving
interconnect, Clock skew, Clock distribution
- Strategy for studying: Make
sure you understand Homework 3 and 4 problems. Make sure you understand
design examples and problems in Chapters 7, 8, 9, 10, 11. Think about what
kinds of problems are realistic to ask during a 2 hour exam. For example,
I can't ask you do to major design work (e.g. sizing, layout, complex
logic, etc.) in this time frame. But I can ask you to do partial design
and analysis.
Coming up in next lecture: