VLSI project ideas

ECE 658

Fall 2006

Here is a list of projects for 658 (and ambitious 558) students to choose for Lab 4. There are two types, 1) Design and 2) Analysis. Both types will actually involve both design and analysis aspects but there will be more of an emphasis on one or the other. Most projects have an additional mentor besides Prof. Burleson and Basab who will help you on the project. Most projects will build on the Cadence/SPICE tools that you have used in Labs 1,2,3. I am also interested in some projects which are implemented in FPGA using Verilog and Altera/Quartus which will allow much more complex designs, however the key is to leverage what you have learned in this course. Some projects also involve PERL, and various open source CAD tools. You will have to learn these on your own .Students may work in groups of 2. The project must be completed by the end of the semester and will count for 40% of the total lab grade. All projects involve additional readings from the literature. If you want to do a part of your project instead of Lab 3, it should follow the same basic guidelines (ie a 4-bit datapath with registers).

Proposal is due via email on Nov 15 and should consist of a 5 page Word document consisting of:

0) Summary of background reading with full bibliographical references,

1) Problem statement

2) Clear list of deliverables

3) Workplan indicating tools used and file formats

4 ) Schedule with clear partitioning of tasks among group members

Designs:

True and Pseudo Random Function generation – (D. Holcomb)

Leakage based thermal sensor design –(Basab Datta)

Sensor Calibration Function Generator – (Basab Datta)

Datapath for thermal sensor interface and control –(Basab Datta)

Active jitter compensation circuit (Jinwook Jang)

Voltage Droop detector (Jinwook Jang)

Active Skew Detector and Compensator (Jinwook Jang)

Razor latch circuits (Jinwook Jang)

Phase-coded Interconnects (Ibis Benito)

Simplified Delay Locked Loop design (Jinwook Jang)

RFID Power scavenging (D. Holcomb)

RFID Security primitives (D. Holcomb)

Side-channel free logic styles (Lang Lin)

Wear-out monitors

Built-in Current Sensors (BICS)

Analysis:

Process variation analysis in CMOS Interconnects (w/ Ibis Benito)

Jitter analysis (w/ Jinwook Jang)

Power distribution (Jinwook Jang)

Clock distribution (Jinwook Jang)

Thermal security issues (w/ Dhruv Kumar)

Power issues in audio/video decoding (w/ Dhruv Kumar)

Soft error analysis – (w/ Dan Holcomb)

Leakage estimation in SOI (w/ Basab Datta)

Estimation model for subthreshold CMOS SOI logic (w/ Basab Datta)

Virtual Thermal Monitors (w/ Dhruv Kumar)

Thermal issues in Interconnects (w/ Ibis Benito)

Differential Current Sensing (w/ Sheng Xu)