Abstract:

The focus of my doctoral research was to try to reduce the design time of System-on-chip (SoC) computing systems by leveraging configurability during the design process. One method we have explored is to use an SRAM-based FPGA, which can be reprogrammed at no cost to the designer, as the system implementation platform. This allows designers to profile and verify performance on-chip in real-time, instead of in simulation, thus reducing design time. This talk focuses on a system model where Systems Integrate Modules with Predefined Physical Links (SIMPPL). The model represents computing systems as a network of Computing Elements (CEs) interconnected with asynchronous FIFOs. The strength of the SIMPPL model is the CE abstraction, which allows designers to decouple the functionality of a module from system-level communication and control via a programmable controller. This system model reduces design time by facilitating design reuse, system integration, and system verification.

Speaker Bio:

Dr. Lesley Shannon received a B.Sc. in Electrical Engineering from the University of New Brunswick in 1999. She then attended the University of Toronto (U. of T.) for both her Masters and Doctoral studies, obtaining her M.A.Sc. in 2001 and her Ph.D. in 2006. This fall Dr. Shannon joined Simon Fraser University's School of Engineering Science as an Assistant Professor. Her research interests include system design methodologies; alternative computing architectures such as reconfigurable computing, embedded computing, and meta-computing; programming models and environments; and on-chip Computer Aided Design (CAD) tools.

Leveraging Configurability in the System Design Process