The exam is 2-hour long, evening exam; closed books, close notes, open minds. It covers the following material:

• High-level synthesis: algorithms for scheduling and allocation.
• Boolean logic basics, logic representations (two-level, multi-level, etc.)
• Two-level logic minimization (exact and heuristic)
• BDDs: theory, construction, manipulation (APPLY, RESTRICT); applications (logic representation, verification).
• Multilevel logic synthesis basics: factored forms, AIGs.

The exam is two-hour long, closed books, close notes, open minds. It covers the second part of the course, including:

• Multilevel logic synthesis basics: factored forms, AIGs.
• Multi-level logic minimization (kernel-based and ABC).
• Technology mapping (standard cells and FPGAs).
• BDD-based decomposition.
• Sequential synthesis: retiming.
• SATisfiability
• Equivalence checking
• Sequential verification
• FSM traversal.