ECE 559 VLSI Design Project

ECE 659 Advanced VLSI Design Project

University of Massachusetts

Welcome to the 559/659 Course Home Page! This serves as the syllabus for the course. The URL is:

Instructor: Wayne Burleson, Associate Professor, Department of Electrical and Computer Engineering, tel: 413-545-2382, email: Office: KEB309C, Office Hours : TBD

TA: Prashant Jain,, Office: KEB304, Office Hours : TBD

Course Description (3 Credits)

The course will consist of the specification, design, layout and verification of a substantial component of a VLSI system-on-a- chip. Groups of 3-4 students will work together, partitioning tasks, and then presenting their work in the form of 4 design reviews. Some test chips may be sent out for fabrication by MOSIS at the end of the semester, however fabrication is not requried for all projects. This year, all projects will be built around the idea of a configurable system for wireless communications. Most projects will be "cores" that fit into a standard tiled architecture described in J. Liang, S. Swaminathan, and R. Tessier, aSOC: A Scalable, Single-Chip Communications Architecture, in the Proceedings of the IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT), Philadelphia, PA. October 2000. Deep sub-micron design issues will be an important aspect of the course and are reviewed in D. Sylvester and K. Keutzer, Getting to the Bottom of Deep Submicron, Proceedings of International Conference on Computer-Aided Design (ICCAD), pp. 203-211, 1998.

Pre-requisites: Introductory course in VLSI design (i.e. ECE 558/658). A grade of INC in 558/658 does NOT satsify the pre-req.


Review will consist of oral, written and electronic formats. Some projects will result in test-chips that will be fabricated by MOSIS.

Lectures: There are no regular lectures for this course, however class-wide meetings will be held at Tues.,Thurs. 11:15-12:30, room Marston 211. Weekly meeting times between each group and the Prof and TA will be scheduled.

Spring 2001 links :

Details on Design Reviews : I will update these as the semester progresses, but this should give you some idea of what to expect for each review. Here are some General Guidelines for Design Reviews

Schedule (NEW Updated schedule for Spring 2001)
Review  Week of Review  Written Report on Web  Review Description
Proposal Feb 27, Mar 1 Mar 9  NEW Proposal Guidelines 
Feasibility Review Mar 27, Mar 29  April 6  NEW Feasibility Guidelines 
Function Review  April 17, 19, 24, 26 April 27  Function Review Guidelines 
Integration Review May 7, May 9 May 9 Integration Review Guidelines 

Here are some Guidelines for choosing a project

Course Objectives (updated Spring 2001):

Course Objectives related to ABET EC2000 Program Outcomes Criteria (only relevant to undergrads)
1. VLSI Design Process  2. VLSI Skills and Tools 3. App/Component in VLSI  4. VLSI Design Reviews 
ABET Outcomes
1. Apply knowledge of math, science and engr.
2. Design and conduct experiments: analyze and interpret data
3. Design a system, component or process to meet desired needs 
4. Function on multi-disciplinary teams 
5. Identify, formulate, solve engr. problems 
6. Understand professional, ethical responsibility 
7. Ability to communicate effectively 
8. Understand impact of engineering solutions in a global and societal context 
9. Need to continue in life-long learning
10. Knowledge of contemporary issues
11. Ability to use techniques, skills and modern engr. tools needed for engr. practice

Past Projects

Project Ideas: Project Web pages from Spring 99 course,

Crypto Project from Spring 99 highlighted in Engineering News Article

Group URLs from Spring 2000 (some may be broken)

Other information (Last Update: 1/30/01)