ECE 559 VLSI Design Project
ECE 659 Advanced VLSI Design Project
University of Massachusetts
Welcome to the 559/659 Course Home Page! This serves as the
syllabus
for the course. The URL is: http://www.ecs.umass.edu/ece/vspgroup/burleson/courses/559/
Instructor: Wayne
Burleson, Associate Professor, Department of Electrical
and Computer Engineering, tel: 413-545-2382, email: burleson@ecs.umass.edu
Office: KEB309C, Office Hours : TBD
TA: Prashant
Jain, pjain@ecs.umass.edu, Office: KEB304, Office Hours : TBD
Course Description (3 Credits)
The course will consist of the specification, design, layout and verification
of a substantial component of a VLSI system-on-a- chip. Groups of 3-4 students
will work together, partitioning tasks, and then presenting their work
in the form of 4 design reviews. Some test chips may be sent out for fabrication
by MOSIS at the end of the semester, however fabrication is not requried
for all projects. This year, all projects will be built around the idea
of a configurable system for wireless communications. Most projects will
be "cores" that fit into a standard tiled architecture described in J.
Liang, S. Swaminathan, and R. Tessier, aSOC:
A Scalable, Single-Chip Communications Architecture, in the Proceedings
of the IEEE International Conference on Parallel Architectures and Compilation
Techniques (PACT), Philadelphia, PA. October 2000.
Deep sub-micron
design issues will be an important aspect of the course and are reviewed
in D. Sylvester and K. Keutzer, Getting
to the Bottom of Deep Submicron, Proceedings of International Conference
on Computer-Aided Design (ICCAD), pp. 203-211, 1998.
Pre-requisites: Introductory course in VLSI design (i.e. ECE
558/658). A grade of INC in 558/658 does NOT satsify the pre-req.
Grading:
-
Design Review 1: (15%) Proposal
-
Design Review 2: (35%) Feasibility Review
-
Design Review 3: (35%) Layout Review
-
Design Review 4: (15%) Final Review
Review will consist of oral, written and electronic formats. Some projects
will result in test-chips that will be fabricated by MOSIS.
Lectures: There are no regular lectures for this course, however
class-wide meetings will be held at Tues.,Thurs. 11:15-12:30, room Marston
211. Weekly meeting times between each group and the Prof and TA will be
scheduled.
Spring 2001 links :
-
Tuesday 11:15-11:45 Group 1: Cowell, Nhi, Lasko, Fred, ( my recommended
idea: integrating an off-the-shelf programmable core with a custom
core of your own design to support real-time network crypto)
-
Tuesday 11:50-12:20 Group 2: Andy, Ning, Sriram, Manoj, Srividya (my recommended
idea: interconnect arch and circuits to support low-power aSOC)
Andy: reconfig; Ning: Intergration and power; Sriram: wires; Manoj: power; Srividya: clocks (note that both power and clocks are dynamically variable)
-
Thursday 11:15-11:45 Group 3: Arun, Jeevan, Krishna, Rupa (my recommended
idea: integrating ME and DCT cores into overall video coder
and designing a new core for 3D graphics
(working with Prashant, Veesu and Jeongseon)
Read paper at: http://vsp2.ecs.umass.edu/vspg/publication/icassp01.pdf)
-
Thursday 11:50-12:20 Group 4: Brendan, Brian, ChrisA, Santosh,Saurabh (my idea:
integrating an ultra-low-power time-aware core into the tiled architecture)
Brendan/Brian: secure interface; ChrisA: CAM; Santosh: sequencer/FT; Saurabh:
ultra-low power circuit styles, power, clocks
Details on Design Reviews : I will update these as the semester
progresses, but this should give you some idea of what to expect for each
review. Here are some General
Guidelines for Design Reviews
Schedule (NEW Updated schedule for Spring 2001)
Here are some Guidelines
for choosing a project
Course Objectives (updated Spring 2001):
-
1. Learn design process for a complex VLSI in deep sub-micron CMOS
-
2. Learn VLSI design skills and tools, including working in teams
-
3. Learn about a particular application component and its VLSI implementation
-
4. Learn to present formal design reviews using oral, written, graphical
and
web-based techniques
Course Objectives related to ABET EC2000 Program Outcomes
Criteria (only relevant to undergrads)
|
1. VLSI Design Process |
2. VLSI Skills and Tools |
3. App/Component in VLSI |
4. VLSI Design Reviews |
| ABET Outcomes |
|
|
|
|
| 1. Apply knowledge of math, science and engr. |
y |
y |
y |
y |
| 2. Design and conduct experiments: analyze and interpret
data |
y |
y |
n |
y |
| 3. Design a system, component or process to meet desired
needs |
y |
n |
y |
y |
| 4. Function on multi-disciplinary teams |
y |
n |
y |
y |
| 5. Identify, formulate, solve engr. problems |
y |
y |
y |
n |
| 6. Understand professional, ethical responsibility |
y |
y |
y |
y |
| 7. Ability to communicate effectively |
y |
n |
y |
y |
| 8. Understand impact of engineering solutions in a global
and societal context |
y |
n |
y |
y |
| 9. Need to continue in life-long learning |
y |
y |
y |
n |
| 10. Knowledge of contemporary issues |
y |
y |
y |
y |
| 11. Ability to use techniques, skills and modern engr.
tools needed for engr. practice |
y |
y |
n |
y |
Past Projects
Project Ideas: Project
Web pages from Spring 99 course,
Crypto
Project from Spring 99 highlighted in Engineering News Article
Group URLs from Spring 2000 (some
may be broken)
Other information
burleson@ecs.umass.edu (Last Update: 1/30/01)