UMass - VLSI CAD Lab

Welcome to VLSI CAD Laboratory

Our mission is to conduct research in Electronic Design Automation and develop algorithms and software tools for computer-aided design and verification.

We are located in Knowles Engineering Building, KEB 314, tel: (413) 545-3899 on the campus of the University of Massachusetts, Amherst.

Research Activities

Electronic Design Automation: CAD tools and algorithms.

Formal verification and design validation.
Physical design automation, layout synthesis.
Logic synthesis.

Our research has been supported by

The major players are:

Serkan Askar - Physical design automation, datapath layout synthesis.
Priyank Kalla - Testing and verification of sequential circuits.
Zhihong Zeng - Logic verification & validation, functional test generation.
Kai Zhou - Synthesis for mixed PTL/CMOS circuits.
Kesava Talupurr - Verification and validation.

Publications and Slides

A set of selected research papers produced by the group and over 350 PowerPoint presentation slides and tutorials.

Software Releases

BDS (BDD-based Logic Synthesis system) is our fast and efficient logic synthesis tool, based on a novel theory of BDD decomposition. It provides both algebraic and Boolean decomposition of several types: AND, OR, XOR, and MUX. It efficiently handles random and control logic (AND-OR intensive) functions as well as arithmetic (XOR-intensive) functions. Its unique approach to partitioned BDD's allows it to handle very large circuits.
Version BDS-1.2 is now available. Try it and give us your feedback. Download BDS.
This project has been supported by the National Science Foundation under Grant No. 9901254.