A Statistical Study of Defect Maps of Large Area VLSI ICs

IEEE Trans. on VLSI Systems, Vol. 2, pp. 249-256, June 1994

I. Koren, Z. Koren and C.H. Stapper

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Abstract

Defect maps of 57 wafers containing large area VLSI ICs were analyzed in order to find a good match between the empirical distribution of defects and a theoretical model. Our main result is that the commonly employed models, most notably, the large area clustering negative binomial distribution, do not provide a sufficiently good match for these large area ICs. Only the recently proposed medium size clustering model is close enough to the empirical distribution. An even better match can be obtained either by combining two theoretical distributions or by a ``censoring" procedure in which the worst chips are ignored. Another goal of the study was to find out whether certain portions of either the chip or the wafer had more defects than the others.

Index Terms: Defect maps, large area clustering model, low quality ICs, medium area clustering model, yield models.

The complete paper in PDF format. .


A Unified Negative Binomial Distribution for Yield Analysis of Defect Tolerant Circuits

IEEE Trans. on Computers, Vol. 42, pp. 724-437, June 1993.

I. Koren, Z. Koren and C.H. Stapper

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Abstract

It has been recently recognized that the yield of fault-tolerant VLSI circuits depends on the size of the fault clusters. Consequently, models for yield analysis have been proposed for ``large-area clustering'' and ``small-area clustering,'' based on the two-parameter negative-binomial distribution. We propose the addition of a new parameter, the block size, to the two existing parameters of the fault distribution. The new parameter allows us to unify the existing models and at the same time add a whole range of ``medium-size clustering'' models. Thus, we increase the flexibility in choosing the appropriate yield model. We present methods for estimating the newly defined block size and validate our approach through simulation and empirical data.

Index Terms: Block-size estimation, defect tolerance, fault clusters, negative-binomial distribution, VLSI circuits, yield.

The complete paper in postscript. .


A Unified Approach to Yield Analysis of Defect Tolerant Circuits

Defect and Fault Tolerance in VLSI Systems, Vol. 2, C.H. Stapper, V.K. Jain and G. Saucier (eds.), pp. 33-45, Plenum, 1990.

Z. Koren and I. Koren

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Abstract

The dependence of the yield of defect tolerant VLSI circuits on the size of defect clusters (relative to the chip size) has been recently recognized. Consequently, models for yield analysis have been proposed for ``large area clustering" and ``small area clustering". By adding a new parameter, the block size, to the existing parameters of the defect distribution we unify the analysis of the existing models and at the same time add a whole range of ``medium size clustering" models, thus increasing the flexibility in choosing the appropriate yield model. We illustrate our approach through several numerical examples and propose methods for estimating the newly defined block size.


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