The IEEE Transactions on Semiconductor Manufacturing Best Paper Award, presented at the annual Advanced Semiconductor Manufacturing Conference and workshop, recognizes the on-going partnership of this conference and IEEE.
The Editorial Staff is pleased to announce that the paper entitled "Layout Synthesis Techniques for Yield Enhancement," by V.K.R. Chiluvuri and I. Koren, has been recognized as the best paper published in the 1995 Transactions. This paper, which appeared in the May issue, has been chosen because it presents a novel method to apply yield enhancement techniques at a high level of design abstraction. The techniques discussed enable the IC to be desensitized to point defect related yield loss without increasing the die area during the layout synthesis phase of the IC development. The techniques described in this paper have been used in a commercially available CAD framework.
For the complete manuscript in (compressed) PostScript format click here
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