Digital Computer Arithmetic (ECE666) - Suggested
Projects
Notes:
(1) Delay calculation means that the user can enter basic delay
parameters and the simulator will calculate the final delay (with
possibly an attempt to minimize it).
(2) It is highly recommended to try out as many of the currently
available simulators as possible, to have a better idea on how
such simulators work, what type of inputs they allow and use some
of their code whenever possible.
(3) You may either suggest some modification of a project listed
below or suggest a different project altogether. You should email
me your proposal for approval and to "reserve" the selected project.
- A multiplier by a constant operand.
- A squarer.
- A balanced tree design with delay calculation (similar to the
overturned-stairs one)
- A (4;2) compressor-based tree showing also a simplified layout
with delay calculation which will also take wiring delays into
account.
- Addition and subtraction in a hybrid SD system (see problem
2.14 on p. 33).
- A leading 0's detector with delay calculation (several designs
are available in the literature).
- A multi-level combinatorial shifter with delay calculation.
- Various prefix adders with delay calculation.
- Modify the Radix-4 division simulator to show the P-D plot
and the steps for non-redundant and redundant remainder.
- For radix 8 and 16, SRT divider with overlapping radix 2 or 4
stages.
- Rewrite the Division by reciprocation module which does not
work properly. See the comment about the table in the next project.
- Faster algorithms for elementary function evaluation (see for
example, the book by Muller, ref. [11] on p. 246 and other
references).