VLIW: Very Long Instruction Word


Very Long Instruction Word is a concept for processing technology that dates back to the early 1980s. It places heavy emphasis on complex compiler software to achieve a high degree of parallelism (specifically, Instruction Level Parallelism, or ILP).

The term VLIW refers to the size of each instruction that is carried out by a processor. This instruction is "very long" in comparison to the instruction word size utilized by most current mainstream (superscalar) processors. Most non-VLIW processors use complex hardware units to schedule processes in an overlapping fashion known as pipelining. This process allows multiple operations to execute simultaneously, in a cascading fashion, to achieve the maximum utilization of processing power. It is implemented at runtime, which has the result that the hardware is under pressure to accurately order instructions as they fly by. Many techniques are used to predict the upcoming instructions for maximum efficiency in scheduling: what branches the code will take, what registers will be accessed next, what operations will be requested. These algorithms are complicated and tend to bloat the processing hardware. Since the scheduling has to be done on-the-fly, there is potential for time-wasting error.

Since VLIW code is ordered for the processor at compile time, this is all done before the code is ever actually executed. As a VLIW compiler sorts through the code, it examines it to determine which instructions will be able to be executed simultaneously. This is often done via a process called trace scheduling, which will be examined later. It pairs these instructions up to form the lengthy instruction words the technology is named for. The long instructions can be executed easily by the hardware, which in turn is made less complex by the structure of the bits being fed to it. The hardware generally consists of identical multiple execution units, which lend themselves nicely to on-chip tiling.

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