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Quartus II

Honors Project:
Implementation of a Traffic Light Controller circuit

Design a prototype of a traffic lights controller circuit, described in Lab 4 project, using a programmable logic device (PLD, Altera part 7032) and a breadboard.

Project description

To make the design practical, certain changes must be applied to the specification given in lab 4. In particular, the time must be measured in seconds rather than in clock cycles. Additional changes include:

  • The initial state (HG,FR) must remain stable for at least five seconds before any change of lights can occurs.
  • Cycling through yellow lights (HY or FY) should take two seconds; at this point the light on the other road should turn red (FR or HR).
  • The farm road lights should remain Green (FG) no longer than ten clock seconds.
  • Upon return to the initial state (HG, FR) the highway lights are not to be interrupted for at least ten seconds.

To make these changes your design should include a binary counter, which will measure time in clock cycles of a 4 MHz clock used in the design. Such a counter can be implemented in Verilog using a register with sufficient number of bits, incremented at each clock tick. A given action (change of lights) takes place when the counter reaches the required level for that action.

Implementation

Your Traffic Light Controller circuit will have two inputs: Car (car sensor) and a Reset signal; a clock Clk; and six traffic light outputs: three for the highway lights (HG, HY, HR) and three for the farm road lights (FG, FY, FR).
Once the design has been completed and validated by simulation you will program it using a dedicated programmer located in Duda Hall Lab and use it on your breadboard.
You can access Duda Hall lab during the following hours of operation.

The following tutorial describes the PLD programming procedure using Altera PLD programmer. For more details contact directly the TA (Mike Todd).

Use a 4 MHz oscilator circuit as a system clock, and push-buttons for the car sensor and the reset signals. The Reset signal should reset traffic lights to the initial HG/FR state. Use two sets of color LEDs, properly connected to your PLD chip, to indicate traffic lights. Here is a list of parts:

Report

You do not need to submit a separate report for Lab 4. Instead, you will be submitting one, combined report describing the entire project. Please refer to the description of Lab 4 for a detailed description of the report.

In summary, your report should include a brief description of the project, state diagram of the controller, Verilog code, block diagrams and/or component level schematics, timing diagrams from your simulator, an explanation of the method used to design the prototype.

You should also include comments regarding the simulation, design, and testing of your circuit: does it work as intended, etc.