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Lecture 1 (Sect. 1)

Lecture 1 (Sect. 2)

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Section 1: Resistors in series and parallel; voltage divider circuits; current divider circuits; VLSI chip "ELL" resistor; equiv. resistance of a cubic resistor network; simpler example of circuit with resistors in series, parallel

Section 2: Circuit element models; Ohm's Law; voltage drop across a resistor; resistivity of materials; conductors, insulators, semiconductors; series and parallel connections

Lecture 2 (Sect. 1)

Lecture 2 (Sect. 2)

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Section 1: Modeling physical systems; circuit models of electrical systems using sources, flow, control and storage; independent and dependent voltage and current sources; volt-amp characteristic of circuit elements; power dissipated in a resistor; I-V characteristic of a battery; information processing for analog and digital signals

Section 2: Resistors in series and parallel; power dissipated in a circuit element; circuit models with sources, sinks, flow, control and storage; independent and dependent sources;volt-amp chararacteristics (graphs) of resistors and other elements;

Lecture 3 (Sect. 1)

Lecture 3 (Sect. 2)

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Section 1: analysis of resistor networks using Kirchhoff's Voltage Law, Kirchhoff's Current Law; polarity of voltage across resistor; definitions of nodes, branches and loops; systematic method of circuit analysis; Fundamental Theorem of Network Topology

Section 2: definitions of branch, node, loop, independent loop; Kirchhoff's Current Law; Kirchhoff's Voltage Law, voltage division, current division; example; systematic method of circuit analysis; Fundamental Theorem of Network Topology

Lecture 4 (Sect. 1)

Lecture 4 (Sect. 2)

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Section 1: voltage, current, power defined; conservation of power; conductance;Cramer's Rule

Section 2: systematic method of resistive ckt analysis; node voltages; ground reference node; Conservation of Energy for resistive circuits; conductances

Lecture 5 (Sect. 1)

Lecture 5 (Sect. 2)

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Section 1: network theorems; node and loop methods; superposition

Section 2: example of systematic analysis of resistive ckts; Cramer's Rule; nodal analysis; mesh analysis

Lecture 6 (Sect. 1)

Lecture 6 (Sect. 2)

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Section 1: source transformations; Thevenin's and Norton's Theorems

Section 2: superposition; source transformations; Thevenin's Equiv. example

Lecture 7 (Sect. 1)

Lecture 7 (Sect. 2)

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Section 1: Maximum Power Transfer; more examples of Thevenin's, Norton's, superposition

Section 2: Thevenin and Norton Equivalent Circuits and examples; summary of circuit analysis methods to date; Thevenin Equiv. for circuit with dependent source

Lecture 8 (Sect. 1)

Lecture 8 (Sect. 2)

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6:30 - 8:30 p.m. Midterm Exam #1

Sect. 1: Digital voltage levels and the static discipline; noise margins for digital devices; implementation of boolean functions using NAND, NOR logic gates

Suppl: PSPICE simulation of logic gates

Sect. 2: Digital quantization of analog signals; quantization rules; noisy quantized signals; quantization levels for 7400 TTL family; simple logic gates; PSPICE simulation of logic gates; implementation of logic functions using NAND, NOR gates

Lecture 10 (Sect. 1)

Lect10Suppl (Sct 1)

Lecture 10 (Sect. 2)

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Sect.1: MOSFET devices and the switch (S) model; n-channel MOSFET physical structure; MOSFET switch implementation of logic gates

Sect. 2: MOSFET switch model; n-channel MOSFET physical structure; equivalent circuit of a MOSFET; switch implementation of logic gates

Lecture 11 (Sect. 1)

Lecture 11 (Sect. 2)

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Sect. 1: SR model of MOSFET; static analysis using SR model (inverter, and NAND); gate dimensions of logic gates; fan-out of logic gates; power consumption; input-output waveforms and propagation delays

Sect. 2: review of power dissipation in a resistor due to two sources; MOSFET implementation of Inverter and NAND gates; static analysis using SR model; static power consumption by gates

Lecture 12 (Sect. 1)

Lecture 12 (Sect. 2)

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Sect. 1: Active pullups; minimizing circuit size; power dissipation in active pullups; PMOS and NMOS compared; CMOS implementation of inverter, NAND, NOR gates

Sect. 2: MOSFET logic gates; noise margins; power consumption; gate size ratios for combinational logic implementation; active pullups;

Lecture 13 (Sect. 1)

Lecture 13 (Sect. 2)

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Sect.1 : Capacitors and capacitance defined; current and voltage for a capacitor; typical commercial capacitors; energy storage; series and parallel capacitors; gate-source capacitance of a MOSFET and SRC model

Sect. 2: Capacitors and capacitance defined; voltage-current relation for capacitors; examples of capacitor voltage, current for (a) sinusoidal time functions, and (b) step functions. energy storage; response of a simple switched R-C circuit; series and parallel capacitorst

Lecture 14 (Sect. 1)

Lecture 14 (Sect. 2)

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Sect.1: Inductors and inductance defined; current and voltage for an inductor; solenoidal and toroidal inductors; examples of voltage-current relation for inductors; energy storage in an inductor; series and parallel inductors; summary of energy storage in capacitors and inductors

Sect. 2: Effect of gate capacitance on MOSFET models (SRC); Inductors and inductance defined; current-voltage relation for an inductor; inductance of solenoidal and toroidal inductors; response of inductor current to step-function voltage; energy storage in inductors; series and parallel inductors

Lecture 15 (Sect. 1)

Lecture 15 (Sect. 2)

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Sect. 1: First-order transients in RC circuits; first-order differential equations, both homogeneous and inhomogeneous; examples

Sect. 2: First-order transients in RC circuits; first-order differential equations, homogeneous and inhomogeneous; examples

More on solving differential equations, relation to Math 245 topics

Lecture 16 (Sect. 1)

Lecture 16 (Sect. 2)

Suppl notes on inhomogeneous 1st-order ODEs

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Sect. 1: Response of RC circuit to a pulse; transient response of RL circuit; typical forcing signal waveforms; response of RC circuit to a ramp-up, ramp-down input

Sect. 2: Review for midterm exam II; inhomogeneous first-order differential equations; homogeneous and particular solutions; some important cases for forcing functions; switch-resistor-capacitor models of MOSFET gates

Lecture 17 (Sect. 1)

Lecture 17 (Sect. 2)

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Sect. 1: Review for midterm exam II; worked problem 12.18; another example based on problem 12.18; selected other HW solutions

Sect. 2: Example, transient response of RL circuit; time constant of circuit; Example, RL circuit with dependent voltage source, using KVL to set up differential equation

Lecture 18 (Sect. 1)

Lecture 18 (Sect. 2)

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Sect. 1: RC propagation delays in logic gates; charging, discharging delays for SRC models of MOSFETs; computing propagation delays; effect of interconnect resistance, capacitance on propagation delays; clock signal fanout and propagation delays

Sect. 2: S-R models of circuits with two or more inverters; S-R-C model of a series connection of two inverters; computing propagation delays; rise and fall times for clock signals

Lecture 19 (Sect. 1)

Lecture 19 (Sect. 2)

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Sect. 1: Propagation delays in a 3-inverter fan-out driven by a clock; rise and fall times, relation to interconnects; RL and RC circuits driven by sine wave

Sect. 1: Propagation delays, rise time, fall time for MOSFET inverter; effect of inverter interconnect resistance and capacitance on propagation delays; driving several inverters; RC circuit driven by sinusoid;

Lecture 20 (Sect. 1)

Lecture 20 (Sect. 2)

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Sect. 1: Transient response of parallel RLC circuit; examples for overdamped, underdamped, critically damped cases. transient response of series RLC circuit; example for underdamped case.

Sect. 2: Transient response of parallel RLC circuit; examples for overdamped, underdamped, critically damped cases; summary of 2nd-order ODE procedure for these cases.

Lecture 21 rev (Sect. 1)

Lecture 21 (Sect. 2)

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Sect. 1: Forced response of an RLC circuit; particular solutions for various forcing functions; using initial values and final values; three examples of parallel RLC circuit with current source forcing function, for overdamped, underdamped, critically damped responses; comparison of these responses.

Sect. 2: Forced response of an RLC circuit; example of series RLC circuit for overdamped, underdamped, critically damped responses; a 2nd-order response from a circuit with two capacitors; example showing initial conditions for RLC circuit.

Lecture 22 rev (Sect. 1)

Lecture 22 (Sect. 2)

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Sect. 1: RLC transient effects on inverter gates; effect of inductance on pull-down transient time; comparison to RC models; calculating pull-up time, with RLC models; definition of HIGH, LOW logic states with ringing present

Sect. 2: Transient response of RLC circuits with forcing functions; form of the particular response for typical forcing functions; step responses; definition of zero-state response, and example; using the final value to get the particular response to a step function. Example for case where initial state is not zero. Relation of total response to zero-state response and zero-input response.

Lecture 23 (Sect. 1)

Lecture 23 (Sect. 2)

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Sect. 1: Review of procedures for finding transient response of RLC circuits, for more general configurations; example for switched RLC circuit; example for automobile ignition circuit to fire sparkplug

Sect. 2: Review for final exam; differential equation solution techniques; zero-state and zero-input responses; decomposition of forcing functions; example of RLC circuit response to voltage pulse;

Lecture 24 (Sect.1)

Lecture 24 (Sect. 2)

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Sect. 1: Review for final exam; state variable method of circuit analysis; solving 2nd-order systems using zero-state response and zero-input response; RLC circuit example of zero-state response to pulse input

Sect. 2: Review for final exam; zero-state and non-zero-state response of RLC circuits; example of RLC circuit with switched components.

Lecture 25 (Sect. 1)

Lecture 25 (Sect. 2)

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