 |
Russell
Tessier Associate Professor |
B.S.C.S.E., Rensselaer
Polytechnic Institute, 1989
M.S., MIT, 1992; Ph.D., MIT, 1999
RESEARCH INTERESTS: Reconfigurable Computing. Field-Programmable Gate Array Architecture. CAD Algorithms for FPGAs. FPGA-based Logic Emulation.
AFFILIATED RESEARCH
LABORATORY:
Reconfigurable
Computing Group
SELECTED RECENT PUBLICATIONS:
- M. Kudlugi, C. Selvidge, and R. Tessier, Static Scheduling of Multiple Asynchronous Domains for Functional Verification , in the Proceedings of the 38th Design Automation Conference , Las Vegas, Nevada, June 2001.
- R. Tessier and W. Burleson, Reconfigurable Computing and Digital Signal Processing: A Survey , in Journal of VLSI Signal Processing , May/June 2001.
- J. Liang, S. Swaminathan, and R. Tessier, aSOC: A Scalable, Single-Chip Communications Architecture , in the Proceedings of the IEEE International Conference on Parallel Architectures and Compilation Techniques , Philadelphia, PA. October 2000.
- S. Krishnamoorthy, S. Swaminathan, and R. Tessier, Area-Optimized Technology Mapping for Hybrid FPGAs , in the Proceedings of the 10th International Conference on Field-Programmable Logic and Applications , Villach, Austria. August 2000.
SOCIETY MEMBERSHIPS: Eta Kappa Nu, IEEE, ACM.
HONORS & AWARDS: NSF Information Technology Research grant awardee. Lilly teaching Fellow, 2002-2003. College of Engineering Outstanding Junior Faculty Award, 2002-2003. College of Engineering Outstanding Teaching Award, 2002-2003
INSTITUTIONAL & PROFESSIONAL SERVICE: Engineering Computing Services Advisory Committee: 2000-2003. ACM/Sigda International Symposium on Field-Programmable Gate Arrays, Program Chair, 2003, General Chair, 2004. IEEE International Symposium on Field-Programmable Custom Computing Machines, Committee Member, 2004
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2004 University of Massachusetts
Amherst. Site
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