Department of Electrical and Computer Engineering University of Massachusetts Amherst
ECE 668 - Spring 2015
Advanced Computer Architecture
** Topics from Conventional CMOS Microprocessors to Emerging Nanoscale Unconventional Architectures **
Instructor: Csaba Andras-Moritz, Professor
email: firstname.lastname@example.org, phone: 413-320-7669 (email is best way to contact)
Office: room KEB-309H; Instructor's web site: http://www.ecs.umass.edu/ece/andras
Admininstrative Assistant : Christine Langlois, phone: 413-545 3621
Office hours: Tue 2:30PM-3:30PM, Th 2:20PM-3:15PM KEB, or email appointment; 2nd floor next to elevator
Class Time: Tue-Th from 1PM-2:15PM
Place: ELAB 306
- Research papers and other materials are distributed in class or posted on this page. Please always refresh page so that you are not accessing a cached copy.
- We may get assigned a part-time TA depending on enrollment.
- Please check prerequisites before you take on the class.
- For access to slides and other class material/deadlines please see below on this page.
Course Abstract: This course will cover advanced topics in computer architectures focusing on emerging uniprocessor and multiprocessor architectures, implementation issues (architect's perspective) in deep submicron CMOS, as well as nanoscale fabrics and architectures based on new types of emerging devices. Outline: (1) Introduction; (2) Reminder on Pipelined Processors; (3) Parallelism and ILP; (4) Memory Hierarchy Design (caches, virtual memory); (5) Multiprocessors (shared memory, distributed memory, synchronization, etc); (6) Implementation Issues in Deep Submicron (power, process variation, etc); (7) Nanoscale Computing Fabrics and Architecture (physical layer including devices and layout, manufacturing constraints, architectures, defect tolerance, variability). (3 credits)
Projects/Exams/Grading: This is a core graduate-level course. Active student participation is expected. The course will have a project (to be selected), one midterm and a final exam. Projects will be listed below but other research-oriented projects can be pursued with instructor approval. Students can choose the project they prefer. Grading: 5% class participation, 30% Project 1 or Project 2, 35% midterm, 30% final exam, and 0% homeworks. Projects should be done in groups of up to four students.
Prerequisites: If you are taking this course you must have already taken an undergraduate-level architecture course (no exceptions) and have basic understanding of computer organization, VLSI, and microprocessor architecture. The projects require good command of programming in either ASM, C, C++, C#, Java or Verilog. For Project 2, you need experience with HSPICE and VLSI. Some VLSI tool exposure may be needed depending on direction.
- research papers - will be listed on this website
-  Hennesy and Patterson, Computer Architecture A Quantitative Approach, 4th or later Edition - this is the main textbook for the class
-  J. P. Shen and Mikko H. Lipasti, Modern Processor Design
-  NASIC, N3ASIC, and SPWF (spin wave) nanoarchitecture papers
-  NASIC textbook chapter - see link above
Other useful books to have:
-  Chandrakasan et al, Design of High-Performance Microprocessor Circuits
-  Jan M. Rabaey, Digital Integrated Circuit
- Descriptions for Project 1 (CMOS processor related) and Project 2 (NASIC processor related) .
- DUE May 4th, 2015, 1PM office in Knowles 309H. Details communicated in class.
- Project 1 help/instructions from the TA in 2008 , Mid Project Review tbd, Final Project Review. gcc-2.7.2.
- Project 2 Help - N3ASIC device models. Also includes a readme file that explains how to use the device models, and an example of HSPICE netlist for a 2-input NAND gate.
Apr 14, 2015
Copyright Csaba Andras Moritz 2008-2015