ECE668 Advanced Computer Architecture

Department of Electrical and Computer Engineering University of Massachusetts Amherst

ECE 668 - Spring 2012

Advanced Computer Architecture

Instructor: Csaba Andras Moritz, Professor
email: andras@ecs.umass.edu, phone: 413-320-7669 (prefer email)
Office: room KEB-309H; URL: http://www.ecs.umass.edu/ece/andras
Admininstrative Assistant : Christine Langlois, phone: 413-545 3621
Office hours: Tue-Th 1PM-2PM, KEB 309H
Class Time: Tue-Th from 11:15AM-12:30PM
Place: ELAB 327 -- NOTE WE will be at MARCUS 106
NOTE: Research papers and other materials are either distributed in class or posted on this page.

MESSAGE BOARD

* message may be added here during the semester

Course Abstract: This course will cover advanced topics in computer architectures focusing on emerging uniprocessor and multiprocessor architectures, implementation issues (architect's perspective) in deep submicron CMOS, and nanoscale fabrics and architectures based on new types of emerging devices. Outline: (1) Introduction; (2) Reminder on Pipelined Processors; (3) Parallelism and ILP; (4) Memory Hierarchy Design (caches, virtual memory); (5) Multiprocessors (shared memory, distributed memory, synchronization, etc); (6) Implementation Issues in Deep Submicron (power, process variation, etc); (7) Nanoscale Computing Fabrics and Architecture (physical layer including devices and layout, manufacturing constraints, architectures, defect tolerance, variability). (3 credits)

Projects/Exams/Grading:

This is a core graduate-level course. Active student participation is expected. The course will have a project (to be selected from two), one midterm and a final exam. Projects will be listed below. Students can choose the project they prefer. Grading: 10% class participation, 40% Project 1 or Project 2, 30% midterm, 20% final exam, and 0% homeworks. Projects should be done in groups of up to three students.

Prerequisites: If you are taking this course you must have already taken an undergraduate-level architecture course and have basic understanding of computer organization, VLSI, and microprocessor architecture. The projects require good command of programming in either ASM, C, C++, C#, Java or Verilog. For Project 2, you need experience with HSPICE and VLSI.

Materials from:

research papers - will be listed on this website

[1] Hennesy and Patterson, Computer Architecture A Quantitative Approach, 4th or later Edition - this is the main textbook for the class

[2] J. P. Shen and Mikko H. Lipasti, Modern Processor Design

[3] NASIC, N3ASIC, N3P, and SPWF nanoarchitecture papers

[4] NASIC textbook chapter - to be handed out

Other useful books to have:

[1] Chandrakasan et al, Design of High-Performance Microprocessor Circuits

[2] Jan M. Rabaey, Digital Integrated Circuits

Projects: Descriptions for Project 1 (CMOS processor related) and Project 2 (NASIC processor related) .

DUE Thursday April 26, Class time, in Knowles 309H. Signup URL emailed by TA.

Project 1 help/instructions from the TA in 2008 (no TA this time) , Mid Project Review tbd, Final Project Deadline/Review. gcc-2.7.2.3 .

Midterm: March 29, 2011; regular classroom, 1 hour, Midterm Review

Final Exam: May 1 (preliminary), 2:30-3:30PM in classroom, Final Review.

Slides/Papers: Introduction, Pipelines, Dynamic and Power-Aware Branch Prediction, (see document with TA's instructions for the project above), Dynamic Scheduling, ARM Architecture Paper (ARM Reference Manual), Exceptions, ROB, & Speculative Tomasulo, ROB Paper, Multiple Issue, Limits for ILP, Midterm Review, Multi-core, Compiler-managed ILP(2), Midterm Exam, Individual Project Review, Software and Hardware-Based Prefetching (performance and power-aware) (2), Process Variation Resilient Architectures, Virtual Memory, Nanoscale Processors & NASICs (2), Overview Multiprocessors (if we have time), Final Exam Review (TBD).

Last updated: January 23, 2012
andras@ecs.umass.edu