[Random Info (Below) |  Nanoscale Computing Fabrics/Architectures LaboratoryPapers |Classes I Teach]  

Csaba Andras-Moritz 


andras@ecs.umass.edu
(413) 545-2442 

Administrative
Christine Langlois
Phone:
(413)-545-3621

Address
University of Massachusetts, Amherst,
Elect. and Comp. Eng.
Knowles Eng. Building,
309H, 
Amherst, MA 01003

Figures – Below: 2-bit NASIC ALU with nanowires; Right column: nanofabric components – graphene, nanowire, spin based– AFM images sub 30nm


I'm an entrepreneur and professor. Founder of EPRIVO (private email service), WindowsSCOPE (cyber forensics), and BlueRISC (embedded system assurance) initiatives - with customers worldwide. I taught entrepreneurship and technical topics. My group is a winner of 9 Best Paper/Poster awards since 2008. I was the general chair of 10 international conferences or workshops in computer systems and been in the executive committee of two national reserach centers in the US.

My research group at UMASS is focusing on developing computing fabrics and new models of computation with emerging technology. A current direction is on 3D nanofabrics for 3D cognitive/microprocessor ICs (Skybridge, 3D Fine-Grained/Monolythic CMOS) and on Causal-Intelligence (Bayesian) Brain-inspired Architectures with nanotechnology. The Bayesian approach is one of the 5 papers selected for Rebooting Computing Special Issue in IEEE Computer (Dec, 2015). Other work in my group include NASICs, Spin Wave Functions, N3ASIC, magneto-electric directions, and wave-interference computing with spin devices, etc. We do occasional experimental (Cleanroom) work in addition to detailed cross-layer (device-circuit-architecture-application) theoretical explorations. We demonstrated experimentally the N3ASIC nanofabric at sub-30nm scale in 2014 and several aspects of 3D Skybridge.

My entrepreurial interest is in architecting for security and privacy. I founded BlueRISC Inc in 2002, to develops hardware and software roots of trust (e.g., secure processors with randomly generated instruction sets) and system assurance tools (e.g., for the purpose of finding software vulnerabilities in executables). The MorSE binary-compiler allows state-of-the-art analysis and code insertion in the embedded space. The ThreatsSCOPE exploitability analysis and runtime framework is chosen for cyber defense in cars by one of the leading car engine control unit (ECU) providers worldwide. WindowsSCOPE focuses on cyber-security forensics tools for incident responders (to find evidence of an intrusion/compromise). These systems and tools are sold in 18 countries worldwide.

My most recent initiative - launched Oct 2018- is a digital privacy solution for consumers called EPRIVO. EPRIVO private email service is the first approach that allows emails to be confidential, authenticated (no fake senders or origin of emails), and where a sender controls emails forever including in recipient devices (e.g., it can delete any email anytime and will vanish everywhere). It is also the first approach that works on your existing email address; it integrates with 3rd party email clients. It has several innovative ideas including using physical security in addition to digital approaches. Can be downloaded on all devices.

I am the Director of the Nanoscale Fabric and Cognitive Architectures Laboratory. I co-led the Nanoelectronics Technical Research Group at the CHM/NSEC NSF-sponsored nanoscience center and was a member of its executive committee. I was also a member of the FENA/FCRP-DARPA nanoarchitectonics research center executive committee and was a Theme Lead for the Nanofabrics research theme between 2008-2012.

SERVICE I was the General Chair of of Nanoarch IEEE/ACM International Symposium on Nanoscale Architectures in 2017 in Newport, RI. Also, General Chair or Co-Chair in 2011, 2012, 2013, 2014, 2015, 2016 (San Diego, Amsterdam, NYC, Paris, Boston, and Bejing). I was the first steering commitee chair of IEEE Transactions on Multi-Scale Systems (helped with its launch and editorial board, 2014-2015), was an Associate Editor (AE) for IEEE Transactions on Nanotechnology (2009-2015). I served as an AE of IEEE Transactions on Computers (2001-2006). I was the Guest Editor (GE) of the Elsevier JPDC Special Issue: Computing with Future Nanotechnology. I was the GE of a Special Issue on 3D ICs (2016, Revolutionary 3-D Integration and Design for Next Generation Computing), and Computing with Nanotechnology (in IEEE Transactions on Nanotechnology). I am also a member of the ACM/SIGDA technical committee on emerging technologies.

OPEN POSITIONS: PhD, MS, and postdoc.

OTHER RESEARCH: My earlier projects also included microprocessor design, fine-grained synchronization in multiprocessors, multiprocessor architectures, and parallelizing compilers.

AWARDS in my group: IEEE/ACM Symposium on Nanoscale Architectures Best Paper Award 2013 & 2014, Best 20 Last 25 Years Paper Award at IEEE Symposium on Custom Computing Machines 2013, IEEE Symposium on VLSI 2008 Best Paper award (out of 220+ papers), Best Student Paper at IEEE DFT 2010, Best Student Paper Award at IEEE/ACM Symposium on Nanoscale Architectures 2011, Best Student Paper IEEE DFT 2011 and several Best Research Poster awards at the FENA/FCRP annual reviews including at MIT in 2011 and UCLA in 2012.

FORMER STUDENTS: Some of my former grad students work in academia (4) or are leading architects at Google, Microsoft, Qualcomn, Marwell, IBM, Intel, Lattice, BlueRISC, Nvidia, Tensilica, etc. They work on both conventional and emerging nanoscale computing and associated technology. Rahman Mostafizur is a professor at the Univ of Missouri; Pritish Narayanan is a researcher at IBM Research in Almaden, Ca; Yao Guo is an associate professor at Peking University. Mahmoud Bennaser is  a professor at Kuwait University. Osman Unsal (co-advised) is a senior computer architecture researcher at Universitat Politecnica de Catalunia  in Barcelona. Santosh Khasanvis is a senior research scrientist at BlueRISC/EPRIVO. Tom Wang works on nanoscale CMOS technology at Qualcomm. Raksit Ashok is a compiler architect at Google, Saurabh Chheda is a CPU architect at Tensilica. Prasad Shabadi is a CPU architect at Intel. Other MS students work at Intel, Microsoft, Google, and Apple.

TEACHING: entrepreneurship, advanced computer architecture (graduate), nanoscale fabrics and architectures (graduate), embedded computer systems lab I (undergrad), computer systems lab II (undergrad). Also taught OS (undergrad), parallel architectures (graduate), and microprocessors (graduate).

PHD/POST-DOC ADVISORS: Lars-Erik Thorelli (Royal Institute of Technology, Stockholm); Anant Agarwal (MIT), Saman Amarasinghe (MIT)

Last updated on Sept 17, 2016